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Intel Targets Artificial Intelligence and 5G


Mar. 19 2018, Updated 7:31 a.m. ET

Intel’s FPGA innovations

In the previous part of this series, we saw that 4Q17 was Intel’s (INTC) Programmable Solutions Group’s strongest quarter since its creation in 2016. The growth came as Intel launched two hardware innovations in its Stratix 10 FPGA (field-programmable gate array) product line and the Intel FPGA SDK (software development kit) for OpenCL to increase customers’ productivity.

These innovations were based on Intel’s EMIB (embedded multi-die interconnect bridge) technology, which can package up to six different chipsets fabricated on different technologies and by different manufacturers on a single silicon. The first innovation packages Stratix 10 FPGA with SK Hynix’s and Samsung’s (SSNLF) HBM2 (high-bandwidth memory). The second innovation packages Intel’s FPGA with transceivers manufactured on TSMC’s (TSM) node. In some cases, EMIB combines all three chipsets—FPGA, HBM2, and transceivers.

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Intel’s Stratix 10 FPGA family

Intel has leveraged its low-power EMIB technology to deliver cost-effective innovations. An example of its EMIB technology is its Stratix 10 FPGA, which comprises four variants targeting different application domains.

  • The GX family are general-purpose FPGAs featuring 28G transceivers. They can handle high-bandwidth applications such as switch fabrics and I/O (input/output) protocol bridging, which makes them ideal for a wide range of applications such as mass storage systems, high-end consumer electronics, and high-speed communications.
  • The SX family are SoC (system-on-chip) FPGAs featuring an embedded hard processor system based on a quad-core 64-bit ARM Cortex-A53 MPCore processor. The combination of FPGA and ARM processors is ideal for 5G wireless communications, software defined radios, secure computing for military applications, NFV (network function virtualization), and data center acceleration. The SX family competes with Xilinx’s (XLNX) flagship Zynq UltraScale+ family.
  • The MX family integrates FPGA with four HBM2 tiles, providing aggregate memory bandwidth of 512 Gbps (gigabytes per second). With this, Intel looks to offer a solution for applications that have high memory bandwidth requirements such as machine learning, data analytics, image recognition, workload acceleration, 8K video processing, and HPC (high-performance computing). NVIDIA’s (NVDA) Tesla GPUs (graphics processing units) offer similar solutions and are preferred over FPGAs.
  • The TX family is the industry’s first FPGA with 58G PAM4 transceiver technology. Compared with traditional solutions, the FPGA can double transceiver bandwidth performance, offering an ideal connectivity solution for wireline optical transport networks, NFV, 5G infrastructure, and enterprise networking.

Apart from the above Stratix 10 TX, Intel could offer another TX version that integrates up to 4GB HBM with three 58G transceivers and one 28G transceiver. With that TX version, Intel would seek to address the demand for faster and higher-density connectivity.


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