1Y DRAM and third-generation 3D NAND
In the previous part of this series, we saw that Micron Technology (MU) is on track to achieve bit crossover for 1X, or 18nm (nanometer), DRAM[1. dynamic random access memory] and second-generation 64-layer 3D NAND (negative AND) by the end of calendar 2018. Meanwhile, the company is working on its next technology.
At its fiscal 4Q17[2. fiscal 4Q17 ended August 31, 2017] earnings call, Micron’s CEO, Sanjay Mehrotra, stated that the company is developing its 1Y, or 13nm, DRAM and its third-generation 3D NAND. The company expects to start production of these technologies later in 2018.
Mehrotra did not give any details about the two technologies except that the third-generation 3D NAND would be built on the same CMOS[3. complementary metal-oxide-semiconductor] under the array architecture on which the second-generation 3D NAND was built.
Where Micron stands among its rivals in technology transition
A May 2017 report published in Business Korea stated that Micron plans to invest $2 billion to develop 1Y DRAM technology over the next two to three years. The industry expects 1Y node to improve productivity by more than 20% versus 1X DRAM. Samsung has already developed the 15nm DRAM and plans to start its mass production in 2H17.
Mehrotra stated that the execution of these technology transitions is important for Micron to achieve an improvement in cost and bit growth. He sees more opportunities to shrink the node further, accelerate the volume production ramp-up of new technologies, upgrade fabrication facilities, and expand captive assembly operations.
Next, we’ll look at the company’s capital expenditure plans.