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Behind Micron’s Unique Architecture for 3D NAND

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Mar. 29 2016, Published 6:42 p.m. ET

Micron’s 3D NAND strategy

Micron Technology (MU) is moving fast to introduce advanced process nodes in DRAM (dynamic random access memory). With this move, the company looks to compete with South Korea’s (EWY) Samsung Electronics (SSNLF) and SK Hynix in prices. Beyond that, Micron is also looking to increase its DRAM revenue by diversifying into high-growth segments such as mobile and server.

On the NAND front, the scenario is slightly different. Micron is looking to benefit from the 3D NAND design it developed in collaboration with Intel (INTC), claiming that the design is more cost efficient and can deliver better performance than that of its rivals.

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Micron’s 3D NAND design

In a generic 3D NAND structure, the CMOS (complementary metal-oxide semiconductor) circuitry that supports the memory array is placed outside of the array, which means that the dye is made up of CMOS circuitry. Micron has put a substantial portion of its CMOS circuitry directly under this array.

Why does this matter? The change in placement of the CMOS circuitry reduces the dye size and the cost per bit by 20%. Moreover, the smaller chip means higher density, which leads to better wafer performance. So this 32-tier product gives the performance of a 48-tier product.

3D NAND versus planar technology

The 3D NAND technology is not on par with planar, but it is an advanced technology in terms of endurance and cycling capability, or the number of times the chip can read and write data. The above graph shows that as the company started developing 3D NAND, the technology performed even beyond its original expectations. Moreover, the 3D NAND is 25% less costly than 16nm (nanometer) planar.

Micron versus SanDisk 3D NAND technology

Micron’s 3D NAND architecture has flash cells placed vertically in 32 layers to achieve 256GB (gigabyte) MLC (multi-level cell) and 384GB TLC (triple-level cell) die. On the other hand, the joint venture between SanDisk (SNDK) and Toshiba (TOSBF) has developed a 256GB, 48-layer 3D NAND flash chip and claims to offer the largest capacity available.

In any case, it remains to be seen whose NAND chip performs better and is preferred by customers. Price, rest assured, will be one of the key factors driving demand.

Continue to the next part for a look at Micron’s efforts to ramp up 3D NAND production.

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