Hybrid memory cube
Micron believes memory is at the core of enabling all key technology trends, such as networking, machine-to-machine, mobile, cloud, and big data. Cloud computing, which is changing the enterprise paradigm, is driving demand for greater network bandwidth and speed. Micron believes solid-state drives offer an ideal solution in the space, with faster performance, lower latency, longer lifespan, and lower power consumption than HDDs. The company has forayed into the big data market with its multi-level cell (MLC) enterprise-class solid-state drive (SSD) for servers.
During the company’s earnings call, Micron’s management specifically mentioned the strong growth the company experienced from the public cloud services market. It said, “We continue to see strong growth in the public clouds market, indicating a three year DRAM bit demand CAGR of 76%.” Jefferies analysts said in their research note on Micron, “We expect Cloud Data Center CapEx to grow faster than ~10x larger Telecom CapEx, and drive a secular transition from HDD to SSD, helped by a shift to Software Defined Networking (SDN).”
In terms of memory innovation for cloud computing, Micron is working on HMC or hybrid memory computing enablement with key server customers. The company announced in September last year that it’s shipping 2GB Hybrid Memory Cube (HMC) engineering samples. HMC is designed for applications requiring high-bandwidth access to memory, including data packet processing, data packet buffering or storage, and computing applications such as processor accelerators. The solution provides 160 GB per second of memory bandwidth while using up to 70% less energy per bit than existing technologies, which is expected to lower customers’ total cost of ownership (TCO).
HMC is believed to be superior to the current DDR3 DRAM and the long-awaited answer to the growing gap between the performance improvement rate of DRAM and processor data consumption rates. The Hybrid Memory Cube Consortium (the HMCC), dedicated to the development and establishment of an industry-standard interface specification for HMC technology, released a first draft in February of the new Gen2 specification that supports increased data rate speeds advancing short-reach (SR) performance from 10 Gb per second, 12.5 Gb per second and 15 Gb per second, up to 30 Gb per second. Micron expects volume production of its 2GB and 4GB HMC devices later this year.
The HMC consortium is a focused collaboration of OEMs, enablers, and integrators who are co-developing and implementing an open interface standard for HMC, a high-performance memory solution developed by Micron. Developer members Micron, Samsung Electronics (SSNLF), Altera, ARM, IBM (IBM), Microsoft Corporation (MSFT), Open-Silicon, SK hynix (HSXCF), and Xilinx (XLNX) work directly with adopters to support collective HMC requirements that will initially provide high-performance computing and large-scale networking solutions.