NAND output growth
In the previous part of the series, we saw that Micron Technology’s (MU) new CEO, Sanjay Mehrotra, has been focused on increasing the company’s NAND (negative AND) portfolio.
Mehrotra was the cofounder of flash SSD (solid-state drive) maker SanDisk, which was acquired by Western Digital (WDC) in 2016. At Micron, Mehrotra aims to make Micron’s 3D NAND architecture cost competitive and to focus largely on high-margin enterprise SSDs.
Along these same lines, Micron expects to increase its NAND supply by more than 50% as it aims to achieve bit crossover on second-generation 64-layer 3D NAND by fiscal 2H18 and start initial production of third-generation 3D NAND by 2H18. Bit crossover is achieved when the percentage of total output from a new node surpasses the output from the previous node.
Micron has adopted CMOS (complementary metal–oxide–semiconductor) technology under array architecture for 3D NAND. This architecture is easy to ramp up and delivers strong yields, putting Micron ahead of SK Hynix and Toshiba (TOSBF) in terms of cost-effectiveness.
At the end of fiscal 1Q18, 3D NAND accounted for 80% of Micron’s total NAND output. The company expects to increase this mix to 95% by the end of fiscal 2018.
Micron’s NAND memory solutions
Apart from advanced technology nodes, Micron will also focus on developing high-value nonvolatile memory solutions to maintain its profits even in the downturn.
At the J.P. Morgan 16th Annual CES Technology Forum, Micron’s chief financial officer, Ernie Maddock, stated that the company would focus on expanding its SSD and managed NAND portfolios in the mobile and embedded markets in 2018.