Micron’s Transition to 3D NAND Could Impact Its Near-Term Margins
At present 3D NAND is less efficient than 16-nm, but it is expected to surpass 16-nm in the future. Thus, Micron will see expansion in its gross margins from the NAND business.
Nov. 20 2020, Updated 3:34 p.m. ET
Transition from planar architecture to 3D NAND is a costly affair
In its recent earnings presentation, Micron (MU) stated that volume production of 3D NAND will commence in the second half of 2015. In its fiscal 2Q15 earnings presentation, Micron shared that once its Singapore fab expansion is complete and its planar capacity gets converted to 3D NAND, it expects 40% to 50% NAND bit growth per year “over an extended time horizon.”
Cost per wafer is a key issue considered by NAND flash manufacturers
In this series, we discussed that 16-nm planar NAND is considered the most efficient solution in at least 2015. Why is the industry then shifting its focus towards 3D NAND? The answer lies in cost per wafer, which remains a significant issue for NAND Flash manufacturers.
According to Kevin Kilbuck, director of marketing, Micron Technologies said, “We’ve heard talk that the cost of going from planar to 3D NAND is similar to the cost of opening up a new fab.” Manufacturers aiming to shift to 3D NAND would have to incur capital expenditure that can be “prohibitive for suppliers.” As a result, Kevin Kilbuck is of the opinion that 16nm planar NAND is the best solution through at least 2015.
Thus, at present 3D NAND is not a more efficient process than 16-nm. But with the passage of time, it is expected to surpass 16-nm in terms of profit and efficiency. Thus, Micron will see expansion in its gross margins from the NAND business. However, until then, margins would be under pressure both as the company has to incur high capex as well as wait for the performance advantages of 3D NAND to seep in.
According to Rajvindra Gill of Needham & Co., “3D NAND cell architecture enables performance improvement relative to planar. While the cost side takes a little longer to catch up with the performance advantages, ultimately when you move to 3D NAND cost per bit will improve over time. Vertical stacking allows a larger number of electrons per cell. We think MU’s strategy of optimizing bits per area is the right approach in 3D NAND.”
Samsung (SSNLF) too is expanding the supply of 3D V-NAND. Toshiba also aims to bring 3D NAND architectures to the market soon. In May 2014, SanDisk (SNDK) joined with Toshiba (TOSBF) to produce the bit-cost scalable (or BiCS) 3D NAND technology.
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